Pragmatic Analysis of CNT Interconnects for Nanometer Regime

Shailendra Mishra; Divya Mishra; R.P. Agarwal

doi:https://doi.org/10.14445/22315381/IJETT-V28P281

Research Article | Open Access | Download PDF

Volume 28 | Number 2 | Year 2015 | Article Id. IJETT-V28P281 | DOI : https://doi.org/10.14445/22315381/IJETT-V28P281

Pragmatic Analysis of CNT Interconnects for Nanometer Regime

Shailendra Mishra, Divya Mishra, R.P. Agarwal

Citation :

Shailendra Mishra, Divya Mishra, R.P. Agarwal, "Pragmatic Analysis of CNT Interconnects for Nanometer Regime," International Journal of Engineering Trends and Technology (IJETT), vol. 28, no. 2, pp. 432-435, 2015. Crossref, https://doi.org/10.14445/22315381/IJETT-V28P281

Abstract

The present age of nanometer has made it inevitable to introduce new conventions to meet the ever growing demand of device scaling and circuit minimising. The continuous improvement in electronic circuitry has been assisted by periodic doubling of transistor densities in ICs over the last few decades. However, as every technology, material has its limitation so does the conventional interconnect materials like Cu and Al. Consequently, newer options are being envisaged to meet the current and future demands. To get acquainted with the emerging technologies that assist the incorporation of interconnect subjected to newer technology nodes and extent of integrated circuit scaling, here I review some of them and present as an idea for future advancements for the same.

Keywords

Device scaling, electronmigration, Low-k Dielectrics, porous low-k ILD materials.

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