International Journal of Engineering
Trends and Technology

Research Article | Open Access | Download PDF

Volume 34 | Number 2 | Year 2016 | Article Id. IJETT-V34P252 | DOI : https://doi.org/10.14445/22315381/IJETT-V34P252

Two Stage Operational Amplifier with a Gain Boosted, Source Follower Buffer


S. Srinivas Rahul, P. Naga Tejaswi, Y. Mohan Sandeep, K. Hari Krishna

Citation :

S. Srinivas Rahul, P. Naga Tejaswi, Y. Mohan Sandeep, K. Hari Krishna, "Two Stage Operational Amplifier with a Gain Boosted, Source Follower Buffer," International Journal of Engineering Trends and Technology (IJETT), vol. 34, no. 2, pp. 256-259, 2016. Crossref, https://doi.org/10.14445/22315381/IJETT-V34P252

Abstract

This paper presents design and implementation of a two stage operational amplifier with gain boosted, source follower buffer. The circuit operates efficiently in a closed loop feedback system to solve many impedance issues and makes it suitable for high speed applications. Any fluctuations in supply voltage or dc input voltages can be nullified and stabilizes the operation of the circuit producing large output gain. This architecture also neutralize the effects such as ringing and overshooting in frequency response. 0.6um technology using cadence is used to implement the amplifier. The Op-amp designed here exhibits a noticeable10^4.35 DC differential gain.


Keywords

Operational Amplifier, Gain Band Width, Slew Rate, Common Mode Rejection Ratio.

References

[1] Rajkumar S. Parihar Anu “Design of a Fully Differential Two- Stage CMOS OpAmp for High Gain, High Bandwidth Applications”.
[2] Design Procedure for Two-Stage CMOS Op-Amp withFlexible Noise-Power Balancing Scheme Jirayuth Mahattanakul, Member, IEEE, and Jamorn Chutichatuporn
[3] Design of Analog CMOS Integrated Circuits, Behzad Razavi
[4] Design of an Amplifier through Second Generation Current Conveyor, Nikhita Tripathi, Nikhil Saxena, Sonal Soni
[5] K. N. Leung and P. Mok, “Analysis of Multistage Amplifier- Frequency Compensation,” IEEE Transactions on Circuits and Systems, vol. 48, no. 9.
[6] Analysis of two-stage CMOS Op-Amp forSingle- TransientsHenil Langalia, Sarthak Lad, Mangesh Lolge and Surendra Rathod
[7] Two-Stage High Gain Low Power OpAmp withCurrent Buffer CompensationSachin K Rajput, B K Hemant
[8] Design Procedure for Two-Stage CMOS Operational AmplifiersEmploying Current BufferJ. Mahattanakul
[9] A Two Stage and Three Stage CMOS OPAMP with Fast Settling, High DC Gain and Low Power Designed in 180nm Technology Anshu Gupta D.K. Mishra, R. Khatri U.B.S. Chandrawat Preet Jain

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